Field of the Invention
The present invention relates to a semiconductor device, a display device, and a signal loading method.
Description of the Related Art
ICs are generally provided with an interface to load input signals. Such ICs include, for example, drive ICs employed to display an image on a display panel such as a liquid crystal display. Drive ICs have a function of receiving, from a timing controller semiconductor device, a data signal and a control signal for displaying an image on a display panel, for outputting to a signal line of the display panel.
As an example of a drive IC, Japanese Patent Application Laid-Open (JP-A) No. 2012-44256 describes a semiconductor circuit that is capable of loading, according to signal input format, signals input using different formats, a single-ended input format and a different differential input format.
JP-A No. 2002-311912 describes a liquid crystal display device in which flip flops are disposed in a multi-stage bifurcated style layout, with the operating cycle of the flip flops disposed in each respective stage of the multi-stage halving at each stage from an input stage to an output stage.
JP-A No. H02-44828 describes a technology in which data is latched at the rising edge and falling edge of a clock signal, and two types of data, latched either at a timing of the rise or a timing of the fall of the clock signal (two types of data latched at the rising edge and the falling edge of the clock signal), are output at the same time.
In general, input methods for data (information) input to a drive IC from a timing controller semiconductor device mainly employ differential input formats. For example, reduced Swing Differential Signaling (RSDS) and mini-Low Voltage Differential Signaling (mini-LVDS) are examples of differential input method standards.
Recently, greater speed, as well as compatibility with mini-LVDS interfaces that are faster than RSDS interfaces, are being demanded of IC interfaces.
JP-A Nos. 2012-44256, 2002-311912, and H02-44828 make no reference to loading signals of different differential input formats. The technology described in JP-A No. 2012-44256 is capable of accommodating two formats, a single input format and a differential input format, but is unable to accommodate different differential input formats (such as RSDS and mini-LVDS). Generally, conventional drive ICs do not include functionality for inputs of different differential input formats.
There is consequently a need to redesign drive ICs for each type of signal output from a timing controller, incurring a lengthy development process and redesign costs. An existing solution involves providing a drive IC with circuits corresponding to both of the different differential input signal formats and using a select signal, for example, to select one or other of the circuits for use. However, such a solution leads to the unused circuit becoming redundant.